Note: Price can vary and may be different depends on market and demand.
|Product Attribute||Attribute Value|
|Factory Pack Quantity:||108|
|Subcategory:||Memory & Data Storage|
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Alliance Memory AS4C SDRAM is excessive-pace CMOS synchronous DRAM containing 64Mbits, 128Mbits, or 256Mbits. They are internally configured as 4 banks of 1M, 2M, or 4M word x 16 DRAM with a synchronous interface (all signals are registered on the positive edge of the clock sign, CLK). Read and write accesses to the SDRAM are burst oriented, accesses start at a specific vicinity and preserve for a programmed number of places in a programmed sequence. Accesses begin with the registration of a BankActivate command, which is then followed by way of a Read or Write command.